1, in the principle of the library when the production of attention to the definition of the pin and the name of the package
In the production of the packaging library, pay attention to the schematic pin to one by one correspondence; if the pin does not correspond to the PCB map will appear when the isolation of components.
2, any trace on the PCB in the case of high-frequency signal will cause the delay when the signal, the main role of the serpentine line is to compensate for the "same group of relevant" signal line in the smaller part of the delay, These parts are usually less or less than other signals by another logic; the most typical is the clock line, usually it does not need to go through any other logic processing, so its delay will be less than other related signals.
Because the application of different occasions with different effects, if the serpentine line appears in the computer board, which mainly play a role in the filter inductor to improve the anti-interference ability of the computer, the computer motherboard in the serpentine line, mainly used in Some clock signals, such as PCIClk, AGPClk, its role has two points: 1, impedance matching; 2, filter inductance. The use of the snake line helps to improve the stability of the motherboard, graphics card, help to eliminate the long straight wiring in the current through the inductor phenomenon, reduce the line between the crosstalk between the line, which is particularly evident in high frequency The
3, the welding surface of the placement of components using wave soldering production process, the resistance, the axial direction and wave soldering to the direction of vertical, blocking and SOP (PIN spacing greater than or equal to 1.27mm) components parallel to the direction of transmission IN Pitch, less than 1.27mm (50mil) of the IC, SOJ, PLCC, QFP and other active components to avoid using wave soldering.
4, the distance between the BGA and the adjacent components is more than 5mm; the distance between the other patch elements is 0.7mm; the outer side of the mounting element pad is larger than 2mm from the outer side of the adjacent cartridge; Crimp the connector around 5mm can not be inserted within the yuan, the device, in the welding surface around 5mm can not have the placement of components, devices.
5, IC to even the layout of the capacitor to try to close to the IC's power pin, and make it with the power and ground between the shortest loop.
6, component layout, should be appropriate to consider the use of the same power supply devices put together as far as possible in order to separate the future power supply.
7, for impedance matching purposes Resistive device layout, according to its reasonable layout. The arrangement of the series matching resistor should be close to the drive end of the signal, the distance is not more than 500m, the matching resistance and the capacitor layout must distinguish the source and the terminal of the signal. For the multi-load terminal matching, The
8, after the completion of the layout to print out the assembly diagram for the schematic designer to check the correctness of the device package, and confirm the board, backplane and connector signal correspondence, after confirmation to start wiring.
9, set the wiring constraints
1) Report design parameters
After the basic layout of the layout, the application of PCB design tools statistical functions, the number of reporting network, network density, average pin density and other basic parameters in order to determine the required number of signal wiring layer.
The number of signal layers can be determined by reference to the following empirical data:
Pin density, signal layer number, board number
Note: The PIN density is defined as: Board area (square inches) / (total number of pins on the board / 14)
10, the hole set
Threaded hole: the minimum diameter of the plate made by the definition of plate thickness, plate thickness ratio should be less than 5 - 8.
The preferred range of pore size is as follows:
Aperture: 24mil 20mil 16mil 12mil 8mil
Pad diameter: 40mil 35mil 28mil 25mil 20mil
Inner Thermal Pad Size: 50mil 45mil 40mil 35mil 30mil
The relationship between plate thickness and minimum pore size:
Thickness: 3.0mm 2.5mm 2.0mm 1.6mm 1.0mm
Minimum pore size: 24mil 20mil 16mil 12mil 8mil
11, blind hole and buried hole:
Blind hole is connected to the surface and the inner layer and not through the entire plate through hole, buried hole is connected between the inner layer and the finished plate surface is not visible vias, these two types of hole size can be set to refer to the line hole The Application of blind hole and buried hole design should be fully aware of the PCB processing process, to avoid unnecessary problems to the PCB processing, if necessary, and PCB suppliers to negotiate.
Test hole: test hole is used for ICT testing purposes of the vias, can also do the vias, in principle, aperture is not limited, the pad diameter should not be less than 25mil, the test center between the center distance of not less than 50mil. It is not recommended to use component welding holes as test holes.
Engineering application:
1) account of specific details, problems and solutions, improvement of the place
2) understand the progress